Creator

Design, train and compile neural networks optimized specifically for FPGAs. Obtaining a final model is typically a three stage process.

• design and train it using the layers provided in the elasticai.creator.nn package.

• translate the model to a target representation, e.g. VHDL

• compile the intermediate representation with a third party tool, e.g. Xilinx Vivado ™

This version currently only supports parts of VHDL as target representations.

The project is part of the elastic ai ecosystem developed by the Embedded Systems Department of the University Duisburg-Essen. For more details checkout the slides at researchgate.

• Users Guide
  • Install
  • Minimal Example
  • Features
• Intermediate Representation
  • Python implementation
  • IrData
  • High Level IR Types
• Ir2Torch and Torch2Ir
  • Concepts
  • Extending Ir2Torch
• Ir2Vhdl
  • Overview
  • Stage 1: High-level IR
  • Stage 2: Low-level IR
  • Stage 3: VHDL Generation
• Plugin system
  • Terminology
  • Design goals
  • Overview
  • Fetching symbols
• Hardware Function ID
  • HW accelerator meta description
• Using the neural network accelerator
  • Middleware Memory Mapped IO via SPI
  • Skeleton v1
  • Skeleton v2
• Quantized Grads
  • Python
• Builtin Plugins
  • Vhdl Plugins
• API Reference
  • elasticai.creator
  • elasticai.creator_plugins.padding
  • elasticai.creator_plugins.time_multiplexed_sequential
  • elasticai.creator_plugins.lutron
  • elasticai.creator_plugins.skeleton
  • elasticai.creator_plugins.counter
  • elasticai.creator_plugins.middleware
  • elasticai.creator_plugins.sliding_window
  • elasticai.creator_plugins.shift_register
  • elasticai.creator_plugins.striding_shift_register
  • elasticai.creator_plugins.grouped_filter
  • elasticai.creator_plugins.combinatorial