elasticai.creator.testing.cocotb_runner#

Module Contents#

Functions#

run_cocotb_sim_for_src_dir

Function for running Verilog/VHDL Simulation using COCOTB environment

run_cocotb_sim

Function for running Verilog/VHDL Simulation using COCOTB environment

check_cocotb_test_result

API#

elasticai.creator.testing.cocotb_runner.run_cocotb_sim_for_src_dir(src_files: collections.abc.Iterable[str] | collections.abc.Iterable[pathlib.Path], top_module_name: str, cocotb_test_module: str, path2src: str = '', defines: dict | collections.abc.Callable[[], dict] = lambda : ..., params: dict | collections.abc.Callable[[], dict] = lambda : ..., timescale: tuple[str, str] = ('1ps', '1fs'), en_debug_mode: bool = True, waveform_save_dst: str = '') pathlib.Path[source]#

Function for running Verilog/VHDL Simulation using COCOTB environment

Parameters:
  • src_files – List with source files of each used Verilog/VHDL file

  • top_module_name – Name of the top module (from file)

  • cocotb_test_module – Fully qualified name of python module containing cotName of the cocotb testbench in Python

  • path2src – Path to the folder in which all src files are available for testing

  • defines – Dictionary of parameters to pass to the module [key: value, …] - usable only in Verilog

  • params – Dictionary of parameters to pass to the module [key: value, …] - value will be ignored

  • timescale – Tuple with Timescale value for simulation (step, accuracy)

  • en_debug_mode – Enable debug mode

  • waveform_save_dst – Path to the destination folder for saving waveform file

Returns:

Path to folder which includes waveform file [Default: simulation output folder]

elasticai.creator.testing.cocotb_runner.run_cocotb_sim(src_files: collections.abc.Iterable[str] | collections.abc.Iterable[pathlib.Path], top_module_name: str, cocotb_test_module: str, defines: dict[str, Any] | collections.abc.Callable[[], dict[str, Any]] = lambda : ..., params: dict[str, Any] | collections.abc.Callable[[], dict[str, Any]] = lambda : ..., timescale: tuple[str, str] = ('1ps', '1fs'), en_debug_mode: bool = True, waveform_save_dst: str = '', build_sim_dir: str | pathlib.Path | None = None) pathlib.Path[source]#

Function for running Verilog/VHDL Simulation using COCOTB environment

Parameters:
  • src_files – List with source files of each used Verilog/VHDL file

  • top_module_name – Name of the top module (from file)

  • cocotb_test_module – Fully qualified name of python module containing cotName of the cocotb testbench in Python

  • defines – Dictionary of parameters to pass to the module [key: value, …] - usable only in Verilog

  • params – Dictionary of parameters to pass to the module [key: value, …] - value will be ignored

  • timescale – Tuple with Timescale value for simulation (step, accuracy)

  • en_debug_mode – Enable debug mode

  • waveform_save_dst – Path to the destination folder for saving waveform file

Returns:

Path to folder which includes waveform file [Default: simulation output folder]

elasticai.creator.testing.cocotb_runner.check_cocotb_test_result(result_folder_cocotb: str = 'build_sim') bool[source]#