elasticai.preprocessor.adc.adc#

Module Contents#

Classes#

SettingsResampler

Settings for defining the properties of the Analog-Digital Converter (ADC). Attributes: total_bits: Integer with total number of bits frac_bits: Integer with fractional number of bits (0= only integer) is_signed: Boolean if conversion will be signed or not srate_orig: Float with sampling rate of the input data stream [Hz] srate_new: Float with sampling rate of the output data stream [Hz] vneg: Float with minimum negative input voltage value vpos: Float with maximum positive input voltage value

TransientResampler

API#

class elasticai.preprocessor.adc.adc.SettingsResampler[source]#

Settings for defining the properties of the Analog-Digital Converter (ADC). Attributes: total_bits: Integer with total number of bits frac_bits: Integer with fractional number of bits (0= only integer) is_signed: Boolean if conversion will be signed or not srate_orig: Float with sampling rate of the input data stream [Hz] srate_new: Float with sampling rate of the output data stream [Hz] vneg: Float with minimum negative input voltage value vpos: Float with maximum positive input voltage value

total_bits: int#

None

frac_bits: int#

None

is_signed: bool#

None

srate_orig: float#

None

srate_new: float#

None

vneg: float#

None

vpos: float#

None

property vcm: float#

Returning the common mode voltage (mid voltage of the voltage ranges)

property lsb: float#

Returning the voltage value to represent the possible Least Significant Bit (LSB)

class elasticai.preprocessor.adc.adc.TransientResampler(settings: elasticai.preprocessor.adc.adc.SettingsResampler)[source]#

Initialization

Class for resampling pre-recorded transient data to get a new data stream output with adapted characteristics

Parameters:

settings – Settings for defining the properties of the Analog-Digital Converter

Returns:

None

do_cut_transient(data: numpy.ndarray, t_range_sec: list[float], use_srate_orig: bool = True) → numpy.ndarray[source]#

Cutting the transient data array to defined time range

Parameters:

  • data – Numpy array with transient data [shape=(num_samples, )]

  • t_range_sec – List with time value [start, stop] or empty

  • use_srate_orig – Boolean for taking the original sampling rate or new one

Returns:

Numpy array with cutted transient data

do_cut_labels(label_id: numpy.ndarray, label_pos: numpy.ndarray, t_range_sec: list[float], use_srate_orig: bool = True) → tuple[numpy.ndarray, numpy.ndarray][source]#

Cutting the labels to defined time range

Parameters:

  • label_id – Numpy array with label ID of the detected event [shape=(num_events, )]

  • label_pos – Numpy array with the position of each label ID [shape=(num_events, )]

  • t_range_sec – List with time value [start, stop] or empty

  • use_srate_orig – Boolean for taking the original sampling rate or new one

Returns:

Tuple with reduced numpy arrays: (0) id, (1) pos

redefine_from_voltage(data: numpy.ndarray, is_int_output: bool = True) → numpy.ndarray[source]#

Function for translating the voltage transient data into digital data stream

Parameters:

  • data – Numpy array with voltage data [shape=(num_samples, )]

  • is_int_output – Boolean for getting the data output in integers else fxp

Returns:

Numpy array with digital data stream

redefine_from_fxp(data: numpy.ndarray, is_int_output: bool = True) → numpy.ndarray[source]#

Function for translating the fixed-point transient data into new values

Parameters:

  • data – Numpy array with fxp data [shape=(num_samples, )]

  • is_int_output – Boolean for getting the data output in integers else fxp

Returns:

Numpy array with redefined digital data stream

redefine_from_int(data: numpy.ndarray, is_int_output: bool = True) → numpy.ndarray[source]#

Function for translating the integer transient data into new values

Parameters:

  • data – Numpy array with integer data [shape=(num_samples, )]

  • is_int_output – Boolean for getting the data output in integers else fxp

Returns:

Numpy array with redefined digital data stream

create_verilog_design(id: str, path2save: pathlib.Path, data: numpy.ndarray, trgg: list = []) → None[source]#

Function for creating the Verilog designs to use pre-recorded in simulations

Parameters:

  • id – ID of Verilog designs

  • path2save – Path to the saved Verilog designs

  • data – Numpy array with transient data / frame used in Simulation [shape=(num_samples, ), type=int]

  • trgg – List with trigger output (event detection, …) used in Simulation [shape=(num_samples, ), type=int]

Returns:

None